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2015 KickAss Gear



Intel's new Coppermine CPUs  by Dr John
  Intel's new "Coppermine" CPU line is just coming out, so we thought it might be a good idea to go over the differences between "Katmai" core and "Coppermine" core CPUs. Intel is using an "E" to designate the new Pentium IIIs.  There are significant changes to this CPU, and in fact, this is the first upgrade to the central "P6" core that was first introduced with the Pentium Pro. In many ways, this new core deserves the designation of "P7". One notable architectural change in these new Pentium IIIs was the addition of a sixth physical layer to the CPU.  Previous Intel chips were composed of five physical layers.

  Change #1: 0.18 micron fabrication. 

  The biggest change was in the trace line width.  That is the width of the circuit lines etched into the semiconductor material. These are the "wires" that carry current pulses through the CPU. Thinner wires within the CPU means two things: 1) low power usage and therefore heat production, and 2) smaller die size.  The "die" size is just the square area of the Pentium III chip itself.

  The very first Pentium II was based upon 0.35 micron wide circuitry.  About a year ago, Intel switched over to the newer 0.25 micron fabrication process, and added SIMD instructions, giving us the Pentium III. Now comes and even bigger change with the shift to the 28% smaller 0.18 micron fabrication process.  This is getting pretty darn small folks, we are talking only 180 nanometers wide. It's almost in the range of Nano Technology! The core voltage on the Pentium II was 2.8 volts, while on the Pentium III "Katmai" CPU it was 2.0 volts (2.05 for the PIII 600).  The core voltage on the "Coppermine" Pentium III is further reduced to 1.65 volts.  This means substantially lower heat output, and better overclockability. 

  The smaller die size for the Coppermine means two important things for Intel and its customers.  1) More CPUs can be etched from a single blank "wafer", which reduces Intel's costs (and hopefully ours eventually), and 2) there was plenty of room left over for putting more stuff on the processor die itself, which leads us to big change #2.

  Change #2: 256Kb On-Die L2 cache.  

  When Intel first came out with the Celeron, it had no L2 cache.  All processors have a small amount of built-in L1 cache (32Kb), but today's applications require much more, and so a secondary, or Level 2 cache, is added to just about all processors.  The original Celeron was an exception, and it suffered in both performance and sales.  Intel quickly added 128Kb of L2 cache onto the die of the Celeron, which means it is actually part of the chip, rather than placed on a circuit board or the motherboard.  This is why this type of L2 cache is called "on-die".  The best part about on-die cache is that it runs as part of the processor, at full processor speed.  The "off-die" L2 cache on the Pentium II was on a circuit board next to the CPU, rather than in the CPU, and it could only run at half the processor speed. So on-die L2 cache is twice as fast.

  The results that Intel achieved with the on-die L2 cache in the Celeron was better than expected.  In fact, the Celeron typically beat the more expensive Pentium II in many benchmarks, due to it's faster L2 cache.  This got Intel engineers thinking about doing the same thing with the new Coppermine Pentium IIIs. But 128Kbs of L2 cache was not enough for their new Flagship product.  Fortunately, the 0.18 micron process allowed them to cram lots more circuit elements onto the same sized die.  The majority of the new die is actually dedicated to 256Kbs of CPU-speed L2 cache.  With twice as much L2 cache as the Celeron, the new Coppermine chips will get better performance in cache intensive programs.  The Pentium II has 512Kbs of L2 cache, running at half processor speed, but unless you are running a server, most standard applications will not need more than 256Kbs of L2 cache for optimal performance. 

  Change #3: L2 cache improvements (the ATC or Advanced Transfer Cache).

  Intel has made some improvements to the design of the L2 cache as well.  First, the bus width on the Coppermine core's L2 cache was increased from 64 bits to 256 bits. This cache will operate faster than the Celeron's cache, improving performance in cache intensive operations. They also increased the L2 cache's associativity from 4-way to 8-way. These improvements in the cache architecture will reduce the delay in retrieving information from the cache.  As long as the application running does not make use of more than 256Kbs of cache, the new Coppermine chips will outperform previous Pentium III processors running at the same clock speed.  In a way, this is a return to the concept of the Pentium Pro, where L2 cache was on-die.  But back then, with the substantially coarser 0.35 micron etching process, the result was a very large and expensive-to-produce chip. At 0.18 microns, an adequate 256Kb L2 cache is easily incorporated into a much smaller die. Expect L2 caches to increase to 512Kbs on-die in future Intel CPU's. Keep in mind that the Athalon processor from AMD has 64Kbs 0f L1 cache, and 512Kbs of L2 cache currently. But the Athalon's L2 cache is off-die, like with the original Pentium III. 

  Change #4: Advanced System Buffering (ASB).

   The final changes in the chip architecture are to improve communication between the CPU and bus.  There are several small memory locations that buffer information traveling between the CPU and the system bus.  The number of these buffers was increased in the Coppermine core. The "writeback" buffers were increased from 1 to 4, the "fill" buffers were increased from 4 to 6, and the number of "bus queue entries" was increased from 4 to 8.  This should facilitate the faster CPU-to-bus transfers that will occur on the new 133MHz front side bus.

  Change #5: Increased Front Side Bus Speed.

   Intel has finally increased the official bus speed on some of the new Coppermine chips from 100MHz to 133MHz.  Current PC-133-rated SDRAM will often run at 150MHz, and so should the 133MHz Coppermine-based processors.  This means the 667MHz Pentium III should run well at 750MHz! 

  Right now, Intel has prices set very high on the 700MHz and 733MHz CPUs, so your best bet is to steer away from them until the next round of Intel price drops.  The slower speed Coppermine chips, on the other hand, are very reasonably priced.  The 500E is debuting at well under $300!  This CPU will almost certainly run at 665MHz with PC-133 SDRAM. We expect many of them will go to 700MHz.

  Keep in mind that not all new Pentium III processors are based on the new 0.18 micron core.  The Pentium IIIs that are designated as "B" versions are based upon the older 0.25 micron "Katmai" core, even though they are rated for a 133MHz front side bus speed setting. The CPUs that are designated "EB" are based upon the Coppermine core, and also have the 133MHz front side bus.  We expect that the "E" versions will have more head-room for bus frequency overclocking than the 133MHz "EB" versions, but we won't know for sure until we get samples to test.



     _ Katmai Core        ___    Coppermine core          

  • 0.25 micron process   => 0.18 micron process
  • 512Kb slow L2 cache  => 256Kb fast L2 cache
  • 64bit wide cache bus => 256 bit wide cache bus
  • 4-way associativity    => 8-way associativity
  • system buffers: 1-4-4 => system buffers: 4-6-8
  • 100MHz bus speed     => 133MHz bus speed 
                                         (some models)

    While the new "E" version Coppermine chips are listed at distributors and resellers, don't expect that you will be able to get one right away.  They have not entered the supply channel in numbers that will get them to many store shelves for at least one or two weeks.  Expect shortages through the end of the year.

   This is a significantly improved processor, especially if you plan on overclocking your system.  The lower power consumption and reduced heat production will allow this processor to be overclocked to between 140MHz and 150MHz on the front side bus, perhaps higher. We will post reviews of the overclockability of these CPUs as soon as we can get them.

                    Dr. John

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